BANGALORE, India — With efficient test access architecture of much interest to the SoC design and test community, two researchers at an Indian technical institute have proposed a design-for-test ...

Deep submicron technology enabled the design of the industry's first very large chips. The magnitude of the design effort involved in creating these chips led to the adoption of reuse methodologies ...

Developing an automated production test solution for current and next-generation complex RF SIP/SOC devices is an increasingly difficult task. Both the test program and the device interface board (DIB ...

T2000 AiR2X air-cooled SoC and power analog test solution · GlobeNewswire Inc. TOKYO, Dec. 11, 2025 (GLOBE NEWSWIRE) -- Leading semiconductor test equipment supplier Advantest Corporation (TSE: 6857) ...

A new technical paper titled “Design and Implementation of Test Infrastructure for Higher Parallel Wafer Level Testing of System-on-Chip” was published by researchers at Inha University and Teradyne. ...

TOKYO, Aug. 08, 2024 (GLOBE NEWSWIRE) -- Leading semiconductor test equipment supplier Advantest Corporation (TSE: 6857) today observed the 25 th anniversary of its flagship V93000 system-on-chip (SoC ...

TOKYO, Sept. 23, 2020 (GLOBE NEWSWIRE) -- Leading semiconductor test equipment supplier Advantest Corporation (TSE: 6857) has announced its next-generation V93000 testers targeted at advanced digital ...

Japan's Advantest has announced an acceleration of its capacity expansion plans for system-on-chip (SoC) test equipment in response to surging demand driven by artificial intelligence (AI) hardware ...